AMD announces a new update to address Ryzen 9000's performance woes ahead of Intel Arrow Lake launch, but it has already blown its early advantage

AMD's fix for the Ryzen 9000 series could provide the performance many were expecting

News By John Loeffler published 30 September 2024

There's no question that the AMD Ryzen 9000 series had a troubled launch, but AMD's latest fixes for the entire lineup of chips could go a long way to addressing the concerns of gamers and creators who might be holding off on buying one of the new chips.

The fix, which is part of the new AGESA ComboAM5 PI 1.2.0.2 microcode update to various AM5 motherboard UEFI BIOSs, comes in two parts, according to TechPowerUp.

First, users can configure the PPT of the AMD Ryzen 9600X and AMD Ryzen 9700X (cTDP) in the updated BIOS up to 140W (which translates to 105W TDP) while maintaining their warranty. This effectively allows users to overclock the base 65W (88W PPT) chips without the risk of wearing them out and not being able to replace them.

Second, the BIOS updates will improve the inter-core latency performance on the AMD Ryzen 9900X and AMD Ryzen 9950X. These two chips use two Complex Compute Dies (CCDs) rather than a single monolithic die for all cores.

In order to get the two CCDs — which have 6+6 and 8+8 cores for the AMD Ryzen 9900X and 9950X, respectively — to act as a single unit, there needs to be an interconnect between the two CCDs. This introduces latency whenever cores need to communicate with each other or when the OS scheduler needs to assign work to various CPU cores.

Typically, the chips are supposed to be optimized to negate this latency as much as possible, but according to AMD, the issue with the high core-to-core latency of the 9900X and 9950X "was mainly due to some corner cases where it takes two transactions to both read, and write, when information is shared across cores on different parts of a Ryzen 9 9000 series processor."

"However, we've been working on optimizing this since the launch of the 9000 series. In the new 1.2.0.2 BIOS update, we've managed to cut the number of transactions in half for this use case, which helps reduce core-to-core latency in multi-CCD models."

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